One or more aspects relate, in general, to processing within a computing environment, and in particular, to facilitating such processing.
Many computing systems use register-indirect branching, in which a location of the address of the next instruction to execute is specified in a branch instruction, instead of the address itself. For instance, a location of a register that includes the address is specified.
Further, in accordance with commonly used application binary interfaces (ABIs), a branch address is first loaded into a general purpose register (GPR), and then, transferred to a special purpose control register (SPR) before effecting a register-indirect branch. For instance, in the Power Instruction Set Architecture (ISA), offered by International Business Machines Corporation, Armonk, N.Y., a branch instruction branches to a counter (CTR) special purpose register. However, the special purpose register is not loaded directly, but via a general purpose register.
The counter register tends to be expensive to read-out. Therefore, at least one ABI indicates that the value of CTR is to be stored in another register, such as R12, when a branch to a subroutine (BCTR) is performed, enabling the other register to be used as a base register by the called function. However, when a branch prediction is made, the branch address may be predicted before the R12 value has been loaded, making the called subroutine stall responsive to a data access, and limiting performance.